ANALOG OFFICE® SUCCESS STORIES
Analog Office software and PDK support BAE System’s revolutionary mixed-signal photonics chip design
BAE Systems, in partnership with AWR, MIT, Cornell University, and Alcatel-Lucent Bell Labs, has been working to produce a new breed of devices that embed photonic devices into silicon-based integrated circuits (ICs), enabling computer chips to perform digital, radio frequency, and photonic functions in a single chip. The Electronic and Photonic Integrated Circuits (EPIC) program, which is funded by Defense Advanced Research Projects Agency (DARPA), intends to produce a viable mixed-signal electronic/photonic application in less than five years. This research is being built on by Alcatel-Lucent Bell Labs, which recently demonstrated the first CMOS silicon-based tunable optical waveguide equalizer, a major step in the industry’s drive toward sophisticated, high-density, low-cost silicon chip-based optical networking devices.
The Design Challenge
BAE Systems is taking a mature electronics process in complementary metal oxide semiconductor (CMOS) and adapting it to add complex photonics functions ranging from the photonic processing of massive amounts of RF bandwidth to extremely high-speed digital interconnects. The team has developed a wide range of monolithically integrated CMOS-compatible photonic devices including ultra-low-power-consumption silicon ring optical modulators, fourth-order narrowband optical filters with tunable passbands and center wavelengths, and silicon-germanium (SiGe) waveguide photodetectors. The design of these revolutionary mixed-signal chips is extremely complex, and accurate behavioral models are key to developing and producing high quality performance at a reasonable cost.
BAE Systems uses Analog Office design suite to develop RF and microwave photonic applications, and AWR provides consulting services for the development of models and process design kits (PDKs). AWR has been working closely with photonics designers at BAE Systems and Bell Labs to develop accurate behavioral models based on the EPIC data. The two teams are also working together to create a PDK that will enable accelerated silicon tapeout of the photonics chips. In addition, AWR’s Analog Office software is being used to extract the models.
The integrity of the electrical and physical model data is often an issue between foundry customers, foundries, and EDA vendors. As part of its commitment to high-level customer service, AWR has invested considerable research and development in PDKs for its Analog Office design suite software. The PDKs are customized for the unique AWR open design platform with its unified data model, and carefully developed from supplied technology files, device models, and design rules specifically for Analog Office. AWR PDKs are subjected to an extensive level of validation at both cell and circuit level to ensure quality and conformance to best-in-class design methodologies for high-frequency RFIC designs.