SIGNAL INTEGRITY DESIGN SUITE
Key Features
- Multi-Technology: Supports multiple process technologies, enabling concurrent design and signal integrity analysis of complex interconnects spanning IC, package, module, and PCB design boundaries
- Model support: Ability to import/support multiple models such as netlist, IBIS, S-parameter, and block
- APLAC® simulator: Provides fast, high-capacity harmonic balance simulator for comprehensive and accurate frequency-domain simulation
- HSPICE: Integrated with Synopsys' HSPICE for fast and accurate spice simulations
- Intelligent Net™ (iNet): Utilized AWR's innovative iNET technology to extract and model complex cross-domain interconnects "on-the-fly"
- EM Socket™: Supports multiple electromagnetic (EM) simulation and analyses tools thru the EM Socket interface for parasitic and full-wave characterization
Benefits
- Right the first time: Designers can identify, analyze, and fix signal integrity issues early in the design cycle, eliminating design respins
- Accuracy: Utilize vendor supplied encrypted HSPICE netlists in multi-gigabit simulations for accurate non-linear behavior
- Efficiency: Leverage Synopsys HSPICE for fast and accurate simulations