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Silicon Foundry Process Design Kits

AWR has established close partnerships with leading radio-frequency integrated circuit (RFIC) foundries to provide enhanced PDK offerings and in turn enable accelerated silicon tapeout to our RFIC customers. Numerous predefined PDKs are available for many RF complimentary metal oxide semiconductor (CMOS), bipolar CMOS (BiCMOS), and silicon germanium (SiGe) process technologies.

Typical PDK's Include

• Intelligent layout Pcells
• Embedded connectivity code
• Layout Pcells have built in intelligence to automatically draw on the right connections
• Pcells dynamically linked to schematic
• Intelligent Net (INet™) multilayer routing
• Nonlinear models: BSIM3/4, VBIC, HICUM, etc.
• Process corner selection
• Spiral inductor X-model generation
• Easy to update XML- and DLL-based component libraries

The integrity of electrical and physical model data across customers, foundries, and EDA vendors is of paramount concern to the RFIC designer.  No one entity can deliver an optimal PDK in isolation. AWR's Silicon PDKs are customized for the unique attributes of the Analog Office design environment and developed specifically from foundry-supplied technology files, device models, and design rules. AWR PDKs are subjected to an extensive level of validation at both cell and circuit level to ensure quality and conformance to best-in-class design methodologies for high-frequency RFIC designs.

Interoperability

As a founder member of the IPL (interoperable PDK) alliance, AWR supports Open Access PDKS, enabling truly interoperable design flow amongst EDA vendors.  More information about IPL can be found at http://www.iplnow.com.

If you have a request for a PDK that is not yet part of the Analog Office portfolio, we offer PDK Development Services:

• Translation of PDKs to AWR design platform
• Modeling and optimization for silicon and GaAs
• Comprehensive PDK validation at model, cell, and circuit levels, including regression and design flow qualification
• Spiral model development and characterization
• RF process performance tuning and characterization, including RF test block and chip design
• PDK developer training to create and maintain AWR kits; Support for CMOS, BiCMOS, Bipolar, SiGe, SOI, GaAs, CCD, and TFT processes

More Information 

Contact your local AWR representative for an up to date list of available PDKs and register here for an software evaluation.