AWR Design Environment Version 9.01 Delivers Key New Features to Enhance Productivity
January 26, 2010
AWR, the innovation leader in high-frequency electronic design automation (EDA), today announced that Version 9.01 of the AWR Design Environment™ (AWRDE) is now available for download from www.awrcorp.com. This new release delivers more than 100 enhancements that increase productivity, including key new features to AWR's APLAC® harmonic balance engine, AXIEM™ 3D planar electromagnetic (EM) simulator, and new elements.
AWRDE Version 9.01 adds a new harmonic balance mode to the APLAC simulator that increases simulation speed for microwave nonlinear circuits, especially when there are an equal number of linear and nonlinear models or more linear than nonlinear models. In addition, AXIEM now supports series ports, which enables designers to use the software to design two-port chip components.
New or enhanced elements include the addition of an XdB compression point control block that lets designers plot all nonlinear measurements from a given schematic at "X" dB into gain compression, and an arbitrary, user-specified bit sequence (V_ARBS) and pseudo-random bit sequence (V-PRBS) that are additional voltage sources available to the user.
The complete list of new features and enhancements in AWRDE v. 9.01 is available from AWR's download site at https://awrcorp.com/download/login.aspx under the "Documentation" tab or from the Help menu of the installed software. Users can also click on any hyperlink within the "What's New" guide to uncover additional details and explanations on new features.