AWR Introduces AXIEM - Innovative New EM Technology That Transforms Microwave/RF Electronic Product Design
AXIEM’s proprietary algorithms deliver speed, capacity, and accuracy to designers of today’s electronic products, migrating EM analysis from pure back-end post verification to upfront diagnostic design
EL SEGUNDO, Calif. - Sept. 10, 2007 - Applied Wave Research, Inc. (AWR®), the innovation leader in RF EDA, today announces AXIEM™ electromagnetic (EM) design software, an innovative and unprecedented design tool that, for the first time, delivers EM analysis as a true upfront design technology, where it benefits designers most by helping to diagnose issues early, thereby significantly shortening the design process. The AXIEM product was developed specifically for three-dimensional (3D) planar applications such as RF printed circuit boards (PCBs) and modules, low temperature co-fired ceramic (LTCC), monolithic microwave integrated circuit (MMIC), and RFIC designs, which are the heart of today’s electronic designs.
“Presently, every modern electronic product, wired and wireless, requires some level of EM analysis,” said Joe Pekarek, AWR’s chief technology officer and visionary of the new product. “Yet current EM solutions have failed to provide for the demands of product designers who require EM analysis as an efficient and accurate design diagnostic utility and not just a pure back-end verification tool. This design need is exactly why we pioneered AXIEM.”
The AXIEM technology is an open boundary, non-gridded, method-of-moments (MoM) solver that supports true thick metal in layered dielectric media. Furthermore, AXIEM leverages the most recent advancements in EM solver and meshing algorithms, as well as computer architecture, to deliver unprecedented speed and accuracy of results that become even more pronounced as the design complexity grows and the number of unknowns increases.
The solver algorithm within the AXIEM technology was expressly pioneered to overcome limitations of existing 3D planar formulations that rely on the Sommerfeld (or similar) integral for delivering speed of simulation yet at the cost of accuracy and dynamic range. AXIEM’s solution methodology is unique to AWR and a proprietary technique that is best-described as similar to the fast multipole method, yet adapted for full-wave analysis. As such, the AXIEM solver algorithm scales on the order of N log(N) as opposed to N^3 (the case for most existing MoM products).
The AXIEM product’s solver technology also enables the user to accurately and robustly simulate to DC, which is essential for obtaining the right bias conditions and setting the DC operating points for active structures. The integrity of these broadband results mitigate any design hiccups that may be associated with using the “DC to daylight” results in a subsequent harmonic balance or transient simulation such as those integrated within AWR’s design environment.
Additionally the AXIEM product boasts the inclusion of auto-calibrated internal ports, which maintain their own current return path with relatively low error. These innovative AXIEM ports eliminate the usual tricks associated with other EM products that require manual de-embedding or an explicit path to a sidewall (i.e., edge ports), and are the ideal excitation for complex structures such as PCBs with many surface-mount pads.
The AXIEM product features an advanced hybrid meshing technology that automatically fractures structures with triangular and rectangular elements and is optimized to maximize accuracy with minimal unknowns. This heuristic approach extends the capacity reach of AXIEM above and beyond traditional single element approaches and likewise makes it an excellent EM tool for signal integrity analysis of large RF PCB designs.
The AXIEM technology’s meshing algorithm additionally supports “thick metal,” in that it creates 3D meshes of extruded planar geometries, correctly accounting for all x, y, and z directed currents on all surfaces. This unique thick metal capability is a prerequisite for successful design of 90nm and 65nm RF complementary metal oxide semiconductor (CMOS) problems, where line thickness is often in parity (1:1 ratio) with line widths. Similarly, thick metal support is further required to correctly characterize silicon spiral inductors as well as very large designs like complete gallium arsenide (GaAs) MMICs.
The AXIEM product as a stand-alone EM solver is a powerful addition to any designer’s set of tools. A key value of AXIEM, however, lies in its integration into the overall AWR design flow, where it contributes significantly to AWR’s commitment to accelerating GHz design. AXIEM is seamlessly tied to circuit and system simulation, layout, and verification through the proprietary AWR unified data model (UDM). The UDM provides features such as extraction directly from simulation without having to perform explicit layout and EM setup steps, thereby incorporating EM directly into circuit simulation.
Furthermore, when the AXIEM design tool is used in conjunction with AWR’s ACE™ technology, which provides fast, automatic interconnect model extraction, the same EM structures can be modified and designed in seconds accordingly with ACE and then more accurately modeled or analyzed within the mainstream design flow with the AXIEM tool. AWR’s UDM and ACE innovations, now combined with AXIEM as an integral part of the overall flow, compliment each other to further cut engineering design time and design iterations from the overall project.
Pricing and Availability
AXIEM (www.axiem3d.com) is presently in beta test with select existing customers. The commercial release is scheduled for Q1 2008. The product is priced at U.S. $30,000 for locked licenses and supports Windows 2000, XP, and Vista. For international pricing or general availability information, contact your local sales representative or AWR directly at firstname.lastname@example.org or 310-726-3000.
Be one of the first to see AXIEM in action—visit AWR’s Booth 912 at the European Microwave Conference, October 9-12 in Munich, Germany, to register for a demonstration.